Murata's LL family of MLC chip capacitors is designed specifically for use in power supply decoupling circuits for very high-speed (> 1GHz) CPU applications. ESL values as low as a few dozen pH are achievable in the multi-terminal product. Available in standard “reverse-geometry” 0612, 0508, 0306 and 0204 footprints, with capacitance values from 0.01 to10µF and voltages from 4 to 50VDC. Capacitance, voltage, and ESL depends on choice of either 2, 8 or 10-terminal style (LLL, LLA, or LLM, respectively).
With the internal electrode geometry re-oriented to achieve minimum ESL in a single-termination style, the LLL series appears with the solderable terminations on the "long side" of the chip. The terminations for the single capacitor inside the chip are distributed among the four solderable terminations along each side of the chip. "Input" and "Output" terminals alternate around the edges of the chip, creating not only multiple parallel paths into and out of the capacitor (which serves to decrease its net inductance), but also achieve maximum magnetic flux cancellation within the capacitor structure, which reduces the net inductance even further. The LLM configuration adds additional terminations, achieving net ESL values of only a few dozen picohenries.